The present invention relates to a method of forming a metal interconnect with good electrical characteristics by a dual damascene process just as intended.
Hereinafter, a known interconnect forming method will be described with reference to FIGS. 5A through 5F.
FIGS. 5A through 5F illustrate cross-sectional structures corresponding to respective process steps for forming interconnects by a known dual damascene process.
First, as shown in FIG. 5A, a first insulating film 102 is deposited on an insulating substrate 101, and a first trench pattern is formed out of the first insulating film 102. Next, the first trench pattern is filled in with a first metallization material 104 (e.g., copper (Cu)) with a first barrier film 103 interposed therebetween and the material 104 and film 103 filled in are planarized. In this manner, a first metal interconnect 105 is formed out of the first barrier film 103 and first metallization material 104. Subsequently, a second insulating film 106 of silicon nitride, for example, is deposited, as a passivation film for the first metallization material 104, over the first insulating film 102 and first metal interconnect 105. Then, an interlevel dielectric film 107 of silicon dioxide, for example, is deposited on the second insulating film 106.
Next, as shown in FIG. 5B, through holes 107a are opened by removing respective parts of the interlevel dielectric film 107 that are located over the first metal interconnect 105.
Then, as shown in FIG. 5C, a positive resist pattern 108, which will be used for defining a second trench pattern and which has openings over the holes 107a, is defined on the interlevel dielectric film 107. Each of the openings of the resist pattern 108 has a diameter equal to or greater than that of an associated one of the holes 107a of the interlevel dielectric film 107. At this point of the process, if the holes 107a, i.e., the openings of the resist pattern 108, have their diameter reduced to a certain size to meet requirements of miniaturization, then the resist material 108a, filled in the holes 107a, cannot be exposed to radiation sufficiently in a subsequent exposure process for the resist pattern 108. This is because the smaller the diameter of the holes 107a or openings, the harder it is for the exposing radiation to reach the deeper levels in the holes 107a. As a result, part of the resist material 108a is unintentionally left inside the holes 107a. The remaining part of the resist material 108a is likely to reach a level higher than the bottom of a second trench pattern that will be defined in the interlevel dielectric film 107 in the next process. According to another method, a resist material may also be intentionally filled in the holes 107a to minimize damage done on the first metal interconnect 105 when the second trench pattern is defined. However, just like the resist material 108a shown in FIG. SC, the same unwanted results are also obtained even by that alternative method.
Next, as shown in FIG. 5D, the interlevel dielectric film 107 is etched using the resist pattern 108 as a mask, thereby forming the second trench pattern 107b, which is linked to the holes 107a, in the interlevel dielectric film 107. Thereafter, the resist pattern 108 and resist material 108a are removed. In this case, an etching residue 110 of the resist material 108a, which has been filled in the holes 107a, is left inside the second trench pattern 107b. The residue 110 has insulation properties.
Then, as shown in FIG. SE, a second barrier film 111 is deposited over the holes 107a and second trench pattern 107b, which have been formed in the interlevel dielectric film 107. Thereafter, these holes 107a and pattern 107b are filled in with a second metallization material 112 such as Cu.
Subsequently, as shown in FIG. 5F, unnecessary portions of the second barrier film 111 and second metallization material 112 are removed, thereby forming second metal interconnects 113 out of the second barrier film 111 and second metallization material 112.
According to this known method, however, the insulating etching residue 110, called an xe2x80x9cinner crownxe2x80x9d, is left inside the second trench pattern 107b in the interlevel dielectric film 107 as shown in FIG. 5D. Thus, the second metal interconnects 113 have their resistance increased or might even be disconnected from the first metal interconnect 105 in a worst-case scenario.
It is therefore an object of the present invention to avoid the unwanted increase in resistance or disconnection of metal interconnects that is usually caused by the etching residue in a known dual damascene process.
The present inventors conducted intensive research on exactly how the xe2x80x9cinner crownxe2x80x9d appeared where a groove-like trench pattern was formed in the upper part of an insulating film so as to be filled with a metallization material in a subsequent process. As a result, we found that the insulating etching residue extended from a stepped interface between a resist material, with which through holes to be linked to the trench pattern had been filled in, and the insulating film.
Thus, we concluded that if the resist material, filled in the exposed through holes to define a resist pattern for the trench pattern to be formed later, is allowed to reach a level no higher than the bottom of the trench pattern, then the inner crown can be eliminated.
To achieve the above object, an inventive interconnect forming method includes the steps of: a) forming a through hole in an insulating film over a substrate; b) depositing a photosensitive masking material over the insulating film as well as inside the through hole; c) patterning the masking material, thereby forming a mask pattern, which has an opening located over the through hole and is used to define a trench; d) etching the insulating film to a predetermined depth using the mask pattern, thereby defining a trench pattern, which is linked to the through hole, in an upper part of the insulating film; e) filling in the through hole and the trench pattern with a conductive material; and f) defining the mask pattern so that no remaining part of the masking material, which has been filled in the through hole, will reach a level higher than the bottom of the trench pattern. The step f) is performed before the step d).
According to the inventive method, before the trench pattern is formed, the mask pattern, used to form the trench, is defined so that no remaining part of the masking material, which has been filled in the through hole, will reach a level higher than the bottom of the trench pattern. Thus, no etching residue of the masking material is left in the upper part of the through hole. And it is possible to prevent the etching residue from increasing the resistance of the metal interconnects or disconnecting the interconnects from each other. As a result, highly reliable metal interconnects with good electrical characteristics can be obtained.
In one embodiment of the present invention, the masking material may be exposed in the step c) to radiation at such a dose as needed for the radiation to pass through the masking material on the insulating film and then the exposed masking material may be developed, thereby forming the mask pattern out of the masking material.
In another embodiment of the present invention, the step d) may include the step of rounding a corner between the top of the through hole and the bottom of the trench pattern in the insulating film.
In still another embodiment, the step f) may include the steps of: i) depositing a negative resist as the masking material on the insulating film in the step b); and ii) leaving part of the negative resist, which has been filled in the through hole, unexposed and then developing and removing the unexposed part of the negative resist in the step c).
In yet another embodiment, the step f) may include the steps of: i) stuffing the through hole with a filler between the steps a) and b); ii) depositing the masking material over the insulating film as well as over the through hole, which has been stuffed with the filler, in the step b); and iii) selectively removing the filler between the steps c) and d).
In this particular embodiment, a lower part of the filler is preferably left in the step iii) inside the through hole so that the top of the lower part will be no higher than the bottom of the trench pattern.
Also, in this embodiment, the masking material is preferably a positive resist, and the filler is preferably a resist that is photosensitive in a wavelength range broader than a wavelength range in which the positive resist is photosensitive.
In yet another embodiment, the step f) may include the steps of: i) forming a cap film, which closes the through hole, on the insulating film between the steps a) and b); ii) depositing the masking material over the cap film on the insulating film in the step b); and iii) forming the trench pattern by etching the cap film and the insulating film using the mask pattern in the step d).
In this particular embodiment, the cap film is preferably formed by a vapor phase epitaxy process that results in a low step coverage.
In still another embodiment, the step f) may include the steps of i) forming the through hole using a first exposure mask in the step a) and ii) forming the mask pattern in the step c). The step ii) includes the sub-steps of: exposing a first part of the masking material using the first exposure mask; exposing a second part of the masking material using a second exposure mask; and developing the exposed masking material. The first part is located over the through hole. And the second exposure mask has an opening over the second part, which is also located over the through hole, and is used to form the trench.
In this particular embodiment, the first part of the masking material is preferably exposed at an optimized dose using the first exposure mask so that after the masking material is developed, part of the masking material inside the through hole will be left under the bottom of the trench pattern.